High-bandwidth memory (HBM) and advanced packaging materials form the supply base for artificial intelligence semiconductors. An AI accelerator package combines stacked DRAM, a logic base die, a silicon or glass interposer, a multilayer organic substrate and an integrated thermal solution. Memory and packaging together account for a larger share of package cost than the logic die.
The supply chain comprises five layers. HBM devices represent the largest share of value. Advanced packaging services, including TSMC's CoWoS and SoIC platforms, Intel's EMIB and Foveros, Samsung's I-Cube and X-Cube, and OSAT equivalents, form the second layer. Substrates and interposers form the third. Packaging and memory materials, including build-up dielectric film, copper-clad laminate, glass cloth, photoresist, plating chemistry, underfill and mould compound, form the fourth. Thermal materials and in-package cooling hardware form the fifth.
Demand is driven by accelerator shipments, by the number of HBM stacks per package, and by package body area. All three are increasing. Stack heights are progressing from 8-Hi and 12-Hi toward 16-Hi and beyond, build-up layer counts are rising, and package body areas are growing as reticle multiples increase.
Several technology transitions are underway. Hybrid copper-to-copper bonding is expected to displace micro-bump interconnect in HBM stacks, removing in-stack underfill and solder while introducing bonding dielectrics and associated consumables. Glass core substrates and glass interposers are entering qualification as alternatives to organic cores and silicon interposers. Panel-format packaging is being developed as a successor to wafer-format assembly. Package thermal design power is rising, moving thermal management from conventional lids and thermal interface materials toward micro-channel lids and direct-to-silicon microfluidic cooling.
The materials layer is characterised by high supplier concentration. Build-up dielectric film, low-coefficient glass cloth and several assembly consumables have limited qualified supply bases. Qualification cycles for these materials are long relative to product generations, which constrains the pace at which alternative sources can be introduced.
Custom HBM, in which accelerator vendors specify the logic base die, is transferring value from memory manufacturers to logic foundries. Production is concentrated in Korea, Taiwan and Japan. Korea and Taiwan account for the majority of value across the chain. The United States is increasing share through domestic memory and packaging investment. China is developing a domestic supply chain under export-control conditions.
High-Bandwidth Memory (HBM) and Advanced Packaging Materials for Artificial Intelligence (AI) Semiconductors: 2027–2037 provides market analysis and eleven-year forecasts for high-bandwidth memory and the advanced packaging materials used in AI semiconductor manufacture. It covers five value layers: HBM devices, advanced packaging services, substrates and interposers, packaging and memory materials, and thermal materials and in-package cooling.
Forecasts are presented annually from 2027 to 2037 in constant 2026 US dollars, segmented by layer, material class, application and region, with base, bear and bull scenarios. Material demand is modelled from physical drivers, including stack heights, build-up layer counts, bonding interface area and package body area, and is presented in both value and volume terms.
The report includes a per-stack materials consumption model for HBM covering through-silicon via and plating chemistry, CMP consumables, bonding dielectrics, underfill and non-conductive film, micro-bump solder, and thinning and handling materials. Supplier concentration is assessed for each material class using CR1, CR3 and Herfindahl-Hirschman Index measures calculated at AI-relevant grade.
The study is intended for materials suppliers, substrate and packaging companies, memory manufacturers, semiconductor equipment suppliers, accelerator vendors, and investors requiring segment-level forecasts and supply-chain risk assessment.
Contents include:
- Executive summary, headline findings and market summary tables
- Scope, methodology, model architecture and scenario definitions
- AI demand base: accelerator shipments, HBM stacks per package, package bill of materials, package area roadmap
- HBM technology: HBM2 to HBM6 specifications, custom HBM, base-die value migration, bonding roadmap, in-stack thermal management, 3D DRAM
- HBM market forecasts: shipments, average selling prices, revenue, generation mix, supplier shares, capacity and demand by customer
- HBM stack materials: per-stack consumption model and forecasts by material class
- Advanced packaging platforms: CoWoS variants, SoIC, EMIB and Foveros, OSAT platforms, panel-level packaging, co-packaged optics, capacity analysis
- Advanced packaging and substrate materials: build-up dielectric film, core materials, copper foil and plating, photoresist, interposers, glass core transition
- Thermal materials and in-package cooling: thermal interface materials by chemistry, micro-channel lids, microfluidic cooling
- Supply chain analysis: concentration, chokepoints, export controls, regional production and consumption
- Consolidated forecasts by layer, application, region and material class, with price indices and scenario analysis
- 142 company profiles, including ownership, financial data, funding history and technology positions. Companies profiled include 3M, Advanced Micro Devices (AMD), AGC (Asahi Glass), Ajinomoto Fine-Techno, Akhan Semiconductor, Alibaba T-Head (PingTouGe), Alpha Assembly Solutions (MacDermid Alpha), Alphabet (Google), Amazon Web Services (AWS), Amkor Technology, Apple, Applied Materials, ASE Technology Holding, Asetek, Asia Vital Components (AVC), ASMPT, Asperitas, Astera Labs, AT&S, Auras Technology, Avalanche Technology, BE Semiconductor Industries (BESI), Biren Technology, Broadcom, Cambricon Technologies, Carbice, Cerebras Systems, Chemours, ChipMOS Technologies, Cooler Master, CoolIT Systems, CoreWeave, Corintis, Corning, Crossbar, CXMT (ChangXin Memory Technologies), Delta Electronics, d-Matrix, Dow, Element Six, Eliyan, Engineered Fluids, Etched, EV Group, Everspin Technologies, Fabric8Labs, Ferroelectric Memory Company (FMC), Foxconn Industrial Internet (FII), Frore Systems, Fujipoly, Furiosa AI, G42, Green Revolution Cooling (GRC), Groq, Henkel, Heraeus, Hesheng Silicon Industry, Hon Hai (Foxconn), Honeywell International, Hua Tian Technology, Huawei Technologies (HiSilicon), Ibiden, Iceotope Technologies, Iluvatar CoreX, Indium Corporation, Intel, Intel Foundry, JCET Group, JetCool Technologies, Kaneka, Kinsus Interconnect Technology, Kioxia Holdings, Kulicke & Soffa, Kyocera, Lam Research, Lambda, LG Innotek, Liquid Wire, LiquidStack, Macronix International, Marvell Technology, MatX, MediaTek, Meta Platforms, M&I Materials, Micron Technology, Microsoft, Montage Technology, Moore Threads Technology, Multibeam, Murata Manufacturing, Nan Ya PCB, Nanya Technology, Neo Semiconductor and more.....
- Market outlook, technology roadmap and strategic conclusions
Table of Contents
1. EXECUTIVE SUMMARY
- 1.1 Scope and headline definitions
- 1.2 Key findings
- 1.3 Market size, growth and CAGR summary
- 1.4 Headline forecasts by material class
- 1.5 Headline forecasts by region
- 1.6 Supply concentration at a glance
- 1.7 The asymmetry between device growth and material growth
- 1.8 Strategic implications for suppliers
- 1.9 Strategic implications for buyers
- 1.10 Major market players
2. INTRODUCTION, SCOPE AND METHODOLOGY
- 2.1 Report objectives
- 2.2 Product scope: the five value layers
- 2.3 Geographic scope
- 2.4 Units, conventions and abbreviations
- 2.5 Forecast methodology
- 2.5.1 Device shipments to stack demand
- 2.5.2 Stack demand to material demand
- 2.5.3 Price modelling and ASP erosion
- 2.6 Demand scenario definitions
3. THE AI DEMAND BASE
- 3.1 The compute stack and where memory sits in it
- 3.2 AI accelerator shipments and package demand
- 3.3 Stacks per package and the HBM demand bridge
- 3.4 Why memory and packaging dominate accelerator cost
- 3.5 The memory wall in serving
- 3.6 Package area growth and the reticle constraint
- 3.7 Hyperscaler capital expenditure and the demand envelope
- 3.8 Sovereign and Chinese demand
4. HIGH-BANDWIDTH MEMORY: Technology and Roadmap
- 4.1 HBM architecture and TSV stacking fundamentals
- 4.2 Generation roadmap
- 4.2.1 HBM3E: the generation that funded the transition
- 4.2.2 HBM4 and HBM4E: interface doubling and the logic base die
- 4.2.3 HBM5, HBM5E and HBM6
- 4.3 Custom HBM and the base-die transfer of value
- 4.4 The bonding integration roadmap
- 4.5 Thermal architecture inside the stack
- 4.6 Processing-in-memory and near-memory compute
- 4.7 The memory tier behind HBM
- 4.8 3D DRAM and the post-2032 path
5. HBM MARKET FORECASTS 2027–2037
- 5.1 Unit, ASP and revenue forecast
- 5.2 Revenue by generation
- 5.3 Supplier share and competitive structure
- 5.4 Capacity outlook
- 5.5 HBM demand by customer
- 5.6 Regional HBM manufacture
- 5.7 HBM pricing dynamics
6. HBM STACK MATERIALS AND CONSUMABLES
- 6.1 The HBM materials bill
- 6.2 Material consumption per stack by generation
- 6.3 TSV formation: plating, barrier and seed
- 6.4 CMP: the class that hybrid bonding creates
- 6.5 Micro-bump metallurgy and its decline
- 6.6 Underfill: capillary, non-conductive film and molded
- 6.7 Hybrid bonding dielectric and consumables
- 6.8 Thinning, carrier bonding and handling
- 6.9 HBM materials market forecast
- 6.10 Concentration and qualification in the HBM material base
7. ADVANCED PACKAGING PLATFORMS FOR AI SEMICONDUCTORS
- 7.1 The 2.5D and 3D architecture continuum
- 7.2 CoWoS and the capacity constraint
- 7.2.1 The CoWoS sub-variants
- 7.3 SoIC and 3D hybrid-bonded logic
- 7.4 Intel and Samsung platforms
- 7.5 The OSAT layer
- 7.6 Panel-level packaging
- 7.7 The photonics interface
- 7.8 Advanced packaging services market forecast
8. ADVANCED PACKAGING AND SUBSTRATE MATERIALS
- 8.1 The package materials stack
- 8.2 Substrate architecture and body size
- 8.3 Build-up dielectric film
- 8.4 Copper-clad laminate, prepreg, glass cloth and fillers
- 8.5 Copper foil, plating chemistry and photoresist
- 8.6 Interposer materials
- 8.7 The glass core transition and its material consequences
- 8.8 Assembly materials: underfill, mold compound and solder
- 8.9 Package materials market forecast
- 8.10 Regional supply of package materials
9. THERMAL MATERIALS AND IN-PACKAGE COOLING
- 9.1 The thermal problem at the package
- 9.2 The thermal interface stack
- 9.3 Liquid metal, phase change and the confinement problem
- 9.4 In-package and direct-to-silicon cooling
- 9.5 Diamond and engineered carbon
- 9.6 Thermal materials market forecast
- 9.7 Supplier consolidation in thermal
10. SUPPLY CHAIN, CONCENTRATION AND GEOPOLITICS
- 10.1 The chain from material to accelerator
- 10.2 Export controls and the parallel stack
- 10.3 Qualification duration as the binding constraint
- 10.4 Capacity investment asymmetry
- 10.5 Risk register
11. CONSOLIDATED MARKET FORECASTS 2027–2037
- 11.1 Total value pool
- 11.2 Forecast by application segment
- 11.3 Forecast by region
- 11.4 Consolidated materials forecast
- 11.5 Price and ASP trajectories
- 11.6 Scenario analysis
- 11.6.1 Sensitivity to the stacks-per-package coefficient
- 11.6.2 Sensitivity to hybrid bonding timing
- 11.6.3 Sensitivity to glass core adoption
12. COMPANY PROFILES
- 12.1 Memory manufacturers (21 company profiles)
- 12.2 AI accelerator, hyperscaler and system vendors (35 company profiles)
- 12.3 Foundries, IDMs and OSATs (18 company profiles)
- 12.4 Substrate, interposer and glass suppliers (15 company profiles)
- 12.5 Packaging and electronic materials suppliers (15 company profiles)
- 12.6 Thermal management and in-package cooling (26 company profiles)
- 12.7 Equipment and process technology (12 company profiles)
13. MARKET OUTLOOK
- 13.1 Market outlook 2027–2037
- 13.2 Technology outlook
- 13.3 Ten strategic conclusions
- 13.4 What would change this forecast
- 13.5 Closing observation
APPENDICES
- Appendix A - Methodology notes
REFERENCES
- 14.1 Retrieved sources
- 14.2 Primary corporate, standards and institutional sources