The market for computing and AI silicon in data centers covers the processors that do the work inside AI and cloud infrastructure: discrete GPUs, custom AI ASICs, server CPUs and data center FPGAs. What has changed since 2023 is not simply scale but structure. The server CPU, which accounted for the clear majority of this market in 2021, now represents a small fraction of it, while the GPU has moved from a minority position to dominance - the fastest reversal of category leadership in semiconductor history.
Recent activity has been defined by three developments. Custom silicon has moved from experiment to volume: Google's TPU, AWS Trainium, Meta's MTIA and Microsoft's MAIA together now ship millions of accelerators annually, and OpenAI's own programme is expected in volume from 2027. Merchant vendors have responded by selling systems rather than chips, with rack-scale platforms integrating 72 to 144 accelerators behind a single coherent fabric - a shift that raises the barrier to competing from designing a chip to delivering an entire rack, along with its power delivery, liquid cooling and system software. And the binding constraint has migrated from silicon to electricity: after packaging shortages in 2023 and high-bandwidth memory shortages through 2024 and 2025, grid interconnection and electrical equipment lead times now govern how quickly capacity can be commissioned.
The outlook to 2040 is for continued growth at a materially slower rate than the 2023–2027 period. Three findings shape that trajectory. Revenue keeps growing after units stop: accelerator shipments peak around 2032 while average selling prices rise more than five-fold across the period, meaning capacity sized against the revenue curve will be overbuilt. AI ASICs overtake GPUs on unit shipments in 2028 but never on revenue, because custom silicon displaces volume at the lower-value inference end while frontier training remains merchant territory. And the cost reductions driving demand come predominantly from model efficiency and serving software rather than from process scaling - meaning much of the value created accrues above the silicon layer.
Value in this chain is determined by position more than by execution. The constrained layers - leading-edge foundry, high-bandwidth memory, advanced packaging and custom silicon co-design - combine growth with genuine defensibility, while system assembly and the merchant accelerator start-up cohort face structurally weaker economics. Risks are concentrated rather than diffuse: power availability, packaging capacity, memory supply, and whether enterprise AI adoption converts from pilot to production at the rate the buildout assumes.
Computing and AI for Data Centers: Global Market 2027–2040 is a comprehensive market intelligence report on the semiconductors powering global AI and cloud infrastructure. The report covers chip designers, foundries, memory suppliers, packaging houses, equipment vendors, hyperscalers, model developers, systems manufacturers and infrastructure suppliers across the United States, Taiwan, South Korea, Japan, China and Europe.
Report contents include:
- Executive summary and market definition
- Global AI infrastructure investment and hyperscaler capital expenditure
- Data center power constraints and regional capacity buildout
- Export controls and the US–China technology divide
- Processor market revenue forecasts to 2040: GPU, AI ASIC, server CPU, FPGA
- Average selling price and unit volume forecasts by vendor and programme
- Wafer, die and advanced packaging demand forecasts
- Server tray and rack architecture forecasts
- Cost of AI inference and training, and the token cost roadmap
- Demand drivers: agentic AI, physical AI, recommendation, coding, search
- Capital expenditure versus operating expenditure economics
- Ecosystem, supply chain and co-designer relationship maps
- Market share by revenue, units and deployment volume
- Financial analysis of the leading chip designers
- AI semiconductor start-up funding landscape
- Mainland China market, manufacturers and supply chain
- CPU, GPU and AI ASIC technology and roadmap analysis
- HBM, advanced packaging and rack bill of materials
- Emerging architectures: photonics, neuromorphic, quantum
- Bull, base and bear scenarios to 2040, risks and investment outlook
- 81 company profiles. Companies profiled include Advanced Micro Devices (AMD), Alchip Technologies, Alibaba (T-Head Semiconductor), Alphawave Semi, Amazon Web Services (Annapurna Labs), Amkor Technology, Ampere Computing, Analog Devices, Applied Materials, Arm Holdings, ASE Technology Holding, ASML Holding, Astera Labs, Axelera AI, Baidu (Kunlun), Biren Technology, Broadcom, Cadence Design Systems, Cambricon Technologies, Celestica, Cerebras Systems, Cisco Systems, Coherent Corp, CoreWeave, Credo Technology Group, ChangXin Memory Technologies (CXMT), d-Matrix, Delta Electronics, Dell Technologies, Eaton Corporation, Enflame Technology, Etched, Foxconn (Hon Hai Precision Industry), FuriosaAI, GlobalFoundries, Google (Alphabet), Groq, Global Unichip Corporation (GUC), Hewlett Packard Enterprise, Hygon Information Technology, Ibiden, Iluvatar CoreX, Infineon Technologies, Innolight Technology, Intel Corporation, JCET Group, KLA Corporation, Lam Research, Lightmatter, Lumentum Holdings, Marvell Technology, MediaTek, Meta Platforms, Micron Technology, Microsoft, Monolithic Power Systems, Moore Threads, Nebius Group, NVIDIA Corporation, onsemi, OpenAI, Powertech Technology, Quanta Computer, Rambus, Rebellions, Renesas Electronics, Samsung Electronics, SambaNova Systems, Schneider Electric, Shinko Electric Industries, SiPearl, SK Hynix, Semiconductor Manufacturing International Corporation (SMIC), Super Micro Computer, Synopsys, Tenstorrent, Tokyo Electron, Taiwan Semiconductor Manufacturing Company (TSMC), Unimicron Technology, Vertiv Holdings, and Wistron Corporation.
Table of Contents
1 EXECUTIVE SUMMARY
- 1.1 Global AI Infrastructure and Investment Landscape
- 1.2 Capital formation and the venture channel
- 1.3 US and Chinese Hyperscaler CapEx Trends and Projections
- 1.4 Power as the binding constraint
- 1.5 AI Data Center Typology and Demand Segmentation
- 1.6 AI Regulatory Landscape and Export Controls
- 1.7 Sovereign AI and International Industrial Policy
- 1.8 The US–China Technology Divide
2 MARKET FORECASTS
- 2.1 Processor Revenue Forecast
- 2.1.1 Total Data Center Processor Market, 2021–2040
- 2.1.2 GPU Revenue Forecast, 2021–2040 (p. 64)
- 2.1.3 AI ASIC Revenue Forecast, 2021–2040 (p. 68)
- 2.1.4 Server CPU Revenue Forecast, 2021–2040 (p. 71)
- 2.1.5 FPGA Data Center Revenue Forecast, 2021–2040
- 2.2 Average Selling Price (ASP) Forecast
- 2.2.1 GPU ASP Trends by Product Tier, 2021–2040
- 2.2.2 AI ASIC ASP Trends by Hyperscaler, 2021–2040
- 2.2.3 CPU ASP Trends — Intel Xeon vs. AMD EPYC, 2021–2040 (p. 84)
- 2.3 Processor Volume Forecast
- 2.3.1 GPU Unit Shipments by Vendor, 2021–2040
- 2.3.2 AI ASIC Unit Shipments by Hyperscaler, 2021–2040
- 2.3.3 CPU Unit Shipments by Vendor, 2021–2040
- 2.4 Wafer Forecast
- 2.4.1 GPU & AI ASIC Wafer Starts by Technology Node, 2021–2040
- 2.4.2 Wafer Starts by Foundry
- 2.4.3 GPU & AI ASIC Compute Die Forecast, 2021–2040
- 2.4.4 HBM-Driven Revenue Separation from GPU & AI ASIC
- 2.5 Server Tray Volume Forecast
- 2.6 AI server rack architecture
- 2.7 CPU Focus
- 2.8 The Arm ramp
- 2.9 GPU & AI ASIC Focus
3 MARKET TRENDS
- 3.1 Cost of Generative AI Inference and Training
- 3.2 Why training costs what it does
- 3.3 From Agentic AI to Physical AI
- 3.4 Physical AI
- 3.5 Recommendation Models for Social Networks
- 3.6 Coding Assistants
- 3.7 Search Engine vs. LLM
- 3.8 OpenClaw
- 3.8.1 What it is
- 3.8.2 Why it matters to this forecast
- 3.9 CapEx vs. OpEx in the Era of Generative AI
- 3.10 Is the Future of AI Data Centers in Space?
4 MARKET SHARE & SUPPLY CHAIN
- 4.1 Data Center Ecosystem Map
- 4.2 Foundation Models Ecosystem Map
- 4.3 U.S. vs. China Tech War — Timeline
- 4.4 Financial Metrics of Data Center Chip Designers
- 4.5 AI semiconductor start-up fundraising
- 4.6 Case Study: OpenAI Revenue and Gigawatt
- 4.7 Market Share: CPU, GPU, AI ASIC & XPU Co-Designers
- 4.7.1 GPU Market Share by Revenue and Units (p. 247)
- 4.7.2 AI ASIC Market Share by Hyperscaler
- 4.7.3 CPU Market Share by Vendor
- 4.7.4 XPU Co-Designer Revenue Market Share
- 4.8 Focus on China
5 TECHNOLOGY ANALYSIS
- 5.1 CPU Technology Trends
- 5.1.1 x86 Architecture Evolution
- 5.1.2 Arm-Based CPU Momentum in the Data Center
- 5.1.3 RISC-V in the Data Center (p. 289)
- 5.1.4 CPU Specialization for AI Workloads
- 5.2 GPU Technology Trends
- 5.2.1 Chiplet and Multi-Die Architectures
- 5.2.2 Rack-Scale GPU Architectures — NVL72 and Beyond
- 5.2.3 Memory Bandwidth and HBM Integration
- 5.2.4 Networking and Interconnect Evolution
- 5.3 AI Data Center Traffic Patterns and Network Architecture
- 5.3.1 Four tiers, four different problems
- 5.3.2 Why the traffic looks the way it does
- 5.4 AI ASIC Technology Trends
- 5.4.1 Hyperscaler ASIC Product Roadmaps
- 5.4.2 AI ASIC Start-Up Landscape
- 5.4.3 AI ASIC Technology Specification Database
- 5.4.4 Compute Disaggregation for AI Inference
- 5.4.5 KV Cache and the Storage Tier
- 5.5 GPU vs. AI ASIC: Comparative Analysis
- 5.6 Advanced Packaging and HBM Memory
- 5.6.1 HBM Technology Roadmap — HBM2E to HBM4
- 5.6.2 CoWoS and Advanced Packaging Capacity
- 5.6.3 Custom HBM and Co-Design Trends
- 5.6.4 AI Rack Bill of Materials
- 5.6.5 Thermal Management and Cooling Technologies
- 5.7 Emerging Computing Architectures
- 5.7.1 Photonic Computing
- 5.7.2 Neuromorphic Computing
- 5.7.3 Quantum Computing Outlook
6 OUTLOOK & SCENARIOS
- 6.1 Market Outlook 2026–2040
- 6.2 Technology Outlook 2026–2040
- 6.3 Key Risks and Opportunities
- 6.4 Strategic Recommendations
7 COMPANY PROFILES (81 company profiles)
8 REPORT METHODOLOGY
- 8.1 Objective of the report
- 8.2 Scope of this report
9 GLOSSARY OF TERMS AND ABBREVIATIONS
10 REFERENCES