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市場調查報告書
商品編碼
2100793

ASIC設計與競爭：從晶片級轉向機架/POD級

ASIC Design and Service Competition Shifts from Chip Scale to Rack/POD Level
出版日期: | 出版商: TrendForce | 英文 16 Pages | 商品交期: 最快1-2個工作天內

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簡介目錄

2026年2月16日，MediaTek CEO蔡力行在ISSCC 2026主題演講中指出，衡量人工智慧運算效率的基本單元將不再只是人工智慧晶片，而是包括互連架構、電源和散熱在內的整個人工智慧系統。同樣，2026年5月4日，GUC宣布與Wiwynn達成策略技術合作，共同開發機架/POD級解決方案。這顯示人工智慧晶片設計公司之間的競爭正從晶片級擴展到機架/POD級。

因此，本報告詳細分析了以下三個面向：（1）NVIDIA 的AI 機架/POD 規模化策略；（2）主要通訊服務供應商（CSP）的機架/POD 規模化 AI 部署現況；（3）ASIC 設計與服務供應商的機架/POD 規模化解決方案。本報告目的是闡明各廠商 AI 機架/POD 規模化部署的現況和未來趨勢，並檢驗台灣 ASIC 設計和服務供應商的競爭策略。

主要亮點

  • 用於評估人工智慧效率的指標從單一晶片轉向包括互連、電源和冷卻在內的完整人工智慧系統。
  • 產業競爭正從晶片級擴展到機架和POD級系統解決方案。
  • 本報告分析了 NVIDIA 的機架/POD 策略和關鍵的CSP 部署範例。
  • 此外，本報告還評估了台灣ASIC設計和服務供應商的系統級策略和未來趨勢。

目錄

  • 1.NVIDIA 的AI 機架/POD 規模部署
  • 2.主要雲端服務供應商的AI 機架/POD 規模部署
  • 3.針對ASIC設計和服務供應商的機架/POD規模解決方案
  • 4.TRI的觀點
簡介目錄
Product Code: TRi-192

On February 16th 2026, MediaTek CEO Rick Tsai stated in his ISSCC 2026 keynote that the basic unit for measuring AI compute efficiency will no longer be just the AI chip, but the entire AI system, including interconnect architecture, power, and cooling. On May 4th 2026, GUC likewise announced a strategic technology partnership with Wiwynn to jointly develop rack/pod‑scale solutions, indicating that competition among AI chip design houses is expanding from the chip scale to the rack/pod scale.

This report therefore focuses on an in‑depth analysis of: (1) NVIDIA’s AI rack/pod‑scale strategy, (2) the rack/pod‑scale AI deployments of major CSPs, and (3) rack/pod‑scale solutions from ASIC design and service providers. The goal is to clarify each vendor’s current AI rack/pod‑scale layout and future trends, and to examine the competitive strategies of Taiwanese ASIC design and service providers.

Key Highlights

  • AI efficiency metrics are shifting from standalone chips to full AI systems, including interconnect, power, and cooling.
  • Industry competition is expanding from chip‑level to rack and pod‑scale system solutions.
  • The report analyzes NVIDIA’s rack/pod strategy and major CSP deployments.
  • It assesses Taiwanese ASIC design and service providers’ system‑level strategies and future trends.

Table of Contents

  • 1. NVIDIA’s Deployment in AI Rack/POD Scale
    • Figure 1: Seven Chips of NVIDIA’s Rubin Series
    • Figure 2: Five MGX Racks of NVIDIA’s Rubin Series
    • Figure 3: Schematics of Five MGX Rack Architectures for NVIDIA’s Rubin Series
    • Figure 4: Schematics of NVIDIA’s Vera Rubin POD
    • Table 1: NVIDIA’s Acqusition and Investment on AI Data Center Hardware between 2025 and May 2026
  • 2. Deployment in AI Rack/POD Scale among Major CSPs
    • Figure 5: Comparison of AI Chip Architectures between NVIDIA and CSPs
    • Table 2: Performance Comparison of AI Chips between NVIDIA and Major CSPs
    • Figure 6: Comparison of AI Rack Architectures between NVIDIA and Major CSPs
    • Table 3: Comparison of AI Rack Architectures and Performance between NVIDIA and Major CSPs
  • 3. Rack/POD Scale Solutions among ASIC Design and Service Providers
    • Figure 7: Broadcom’s Deployment in Rack Level
    • Figure 8: Broadcom’s Deployment in POD Level
    • Table 4: Reliable Data of Broadcom’s CPO Switches at Metas’ Data Centers
    • Figure 9: Marvell and Samtec Joined Hands to Work on CPC Solutions
    • Figure 10: Marvell’s Solutions at Rack/POD Level
    • Table 5: Comparison of MicroLED, VCSEL, and DFB as Laser Light Sources
    • Table 6: Overview of ASIC Designers’ AI Data Center-Related Product Lines
  • 4. TRI’s View